1. Field of the Invention
The present invention relates to a method of forming a twin well and, more particularly, to a method of forming a twin well, in which a second well is self-aligned with a first well to scale down the design rule for the well.
2. Discussion of Related Art
A CMOS transistor is constructed in such a manner that PMOS and NMOS transistors are respectively formed in two different regions having conductivities opposite to each other placed in a semiconductor substrate. These regions having conductivities different from each other have a single well or twin well structure. The single well structure is obtained that one-time impurity implantation process is performed for a predetermined portion of the semiconductor substrate to form a well having a conductivity opposite to that of the semiconductor substrate. With the twin well structure, impurity implantation is carried out for a P- or N-type semiconductor substrate twice to form P- and N-type wells. The concentration of the twin well is controlled more accurately than the single well because the well having the same conductivity as that of the substrate is formed through a separate ion implantation. Accordingly, the substrate resistance can be easily controlled, reducing latch-up.
In general, the twin well is divided into a double diffused twin well, retrograde twin well and buried implanted for lateral isolation (BILLI) retrograde twin well structures. The double diffused twin well is formed by ion-implanting P- and N-type impurities into a semiconductor substrate respectively using separate ion implantation masks. With this well structure, the impurity concentration in depth direction of the well is difficult to control. To overcome this problem, there have been developed the retrograde twin well and BILLI retrograde twin well structures in which P- and N-type impurities are ion-implanted several times to control the well concentration easily. In the retrograde twin well and BILLI retrograde twin well, their surface impurity concentrations are reduced to prevent punch-through and the impurity concentrations of their deep portions are increased to decrease the well resistance without varying the surface concentration which affects junction capacitance and substrate bias effect, improving resistance to latch-up.
FIGS. 1A and 1B illustrate a conventional method of forming a retrograde twin well.
Referring to FIG. 1A, a field oxide layer 13 is formed on a P- or N-type semiconductor substrate 11 to define a plurality of active regions. Photoresist is coated on semiconductor substrate 11 by 2.3 to 2.7 .mu.m, exposed and developed, to form a first mask 14 exposing a specific active region. An N-type impurity such as P or As is ion-implanted into the exposed region of semiconductor substrate 11 several times continuously, varying implantation energy and dose, using first mask 14 as an ion implantation mask, forming an N-type well, first well 15. Specifically, P or As is primarily implanted with a high energy of 650 to 750 KeV and with dose of about 1.times.10.sup.13 /cm.sup.2, and secondarily implanted with an energy of 200 to 300 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2. Subsequently, the third implantation is performed with a low energy of 50 to 150 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2, forming first well 15 having impurity concentration which varies with its depth.
The first implantation increases the impurity concentration of deeper region of first well 15 to reduce the well resistance, decreasing latch-up of CMOS transistor to be formed. The second implantation improves channel stop effect under field oxide layer 13, and third implantation controls the surface impurity concentration of first well 15, preventing punch-through.
Referring to FIG. 1B, after removal of first mask 14, photoresist is coated on semiconductor substrate 11 by 2.3 to 2.7 .mu.m, exposed and developed, to form a second mask 16 exposing a region of semiconductor substrate 11, in which first well 15 is not formed. A P-type impurity such as B or BF.sub.2 is ion-implanted into the exposed region of substrate 11 several times continuously, varying implantation energy and dose, using second mask 16 as an ion implantation mask, to form a P-type well, second well 17. Specifically, B or BF.sub.2 is primarily implanted with a high energy of 450 to 550 KeV and with dose of about 1.times.10.sup.13 /cm.sup.2, and secondarily implanted with an energy of 100 to 200 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2. Subsequently, the third implantation is performed with a low energy of 30 to 50 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2, forming second well 17 having impurity concentration which varies with its depth. Here, second mask 16 prevents the that P-type impurity is implanted into first well 15. The first implantation increases the impurity concentration of deeper region of first well 17 to reduce the well resistance, decreasing latch-up of CMOS transistor to be formed. The second implantation improves channel stop effect under field oxide layer 13, and third implantation controls the surface impurity concentration of second well 17, preventing punch-through.
FIGS. 2A and 2B are graphs each of which shows the relationship between depth and impurity concentration in the retrograde twin well conventionally fabricated. FIGS. 2A shows the relationship between the impurity concentration and depth of first well 15, and FIG. 2B shows the relationship between the impurity concentration and depth of second well 17.
First and second wells 15 and 17 are formed in a manner that N- and P-type impurities are ion-implanted several times, for example, three times, varying ion implantation energy and dose. Accordingly, each well has three impurity concentration peaks. That is, each of first and second well 15 and 17 has an impurity concentration peak of 5.times.10.sup.17 to 1.times.10.sup.18 /cm.sup.3 at a depth of 0.8 to 1.0 .mu.m according to the first implantation. Thus, well resistance is reduced to decrease latch-up. Furthermore, each of first and second well 15 and 17 has another peak of 1.times.10.sup.17 to 3.times.10.sup.18 /cm.sup.3 at a depth of 0.4 to 0.5 .mu.m, that is, under field oxide layer 13, according to the second implantation. This improves channel stop effect. Moreover, each well has the peak of about 1.times.10.sup.17 /cm.sup.3 at a depth of 0.1 to 0.2 .mu.m according to the third implantation, preventing punch-through in the substrate 11.
As described above, the conventional method of forming a retrograde twin well uses two masks to form the first and second wells, varying implantation energy and dose several times. However, it is difficult to scale down the design rule for the wells because the first and second wells are not self-aligned with each other.
To solve this problem, there has been proposed the BILLI retrograde twin well structure in which the first and second wells are formed in self-alignment using only one mask in an ion implantation process.
FIGS. 3A and 3B illustrate a conventional method of forming a BILLI retrograde twin well.
Referring to FIG. 3A, a field oxide layer 23 is formed on a P- or N-type semiconductor substrate 21 to define a plurality of active regions. Photoresist is coated on semiconductor substrate 21 by 2.3 to 2.7 .mu.m, exposed and developed, to form a mask 24 exposing a predetermined active region. An N-type impurity such as P or As is ion-implanted into the exposed region of semiconductor substrate 21 several times continuously, varying implantation energy and dose, using mask 24 as an ion implantation mask, forming an N-type well, first well 25. Specifically, P or As is primarily implanted with a high energy of 650 to 750 KeV and with dose of about 1.times.10.sup.13 /cm.sup.2, and secondarily implanted with an energy of 200 to 300 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2. Subsequently, the third implantation is performed with a low energy of 50 to 150 KeV and with dose of about 1.times.10.sup.12 /cm.sup.2, forming first well 25 having impurity concentration which varies with its depth.
The first implantation increases the impurity concentration of deeper region of first well 25 to reduce the well resistance, decreasing latch-up of CMOS transistor to be formed. The second implantation improves channel stop effect under field oxide layer 23, and third implantation controls the surface impurity concentration of first well 25, preventing punch-through.
Referring to FIG. 3B, a P-type impurity such as B or BF.sub.2 is ion-implanted into substrate 21 several times continuously, varying implantation energy and dose to penetrate mask 24, to form a P-type well, second well 27 in a region of substrate 21, in which first well 25 is not formed. Specifically, B or BF.sub.2 is primarily implanted with an energy of 1.5 to 2.5 MeV and with dose of about 1.times.10.sup.13 /cm.sup.2, and secondarily implanted with an energy of 1.3 to 1.7 MeV and with dose of about 1.times.10.sup.12 /cm.sup.2. Subsequently, the third implantation is performed with an energy of 1.0 to 1.1 MeV and with dose of about 1.times.10.sup.12 /cm.sup.2, forming second well 27 having impurity concentration which varies with its depth in a region of substrate 21, where first well 25 is not formed. Here, while B or BF.sub.2 is also implanted into the region on which mask 24 is not formed, this impurity passes through first well 25, forming a P-type buried region 26 under first well 25. P-type buried region 26 does not come into contact with second well 27.
The first implantation increases the impurity concentration of deeper region of second well 27 to reduce its well resistance, decreasing latch-up of CMOS transistor to be formed. The second implantation improves channel stop effect under field oxide layer 23, and third implantation controls the surface impurity concentration of first well 25, preventing punch-through. Second well 27 is self-aligned with first well 25 since the impurity for forming it penetrates first well 25 and mask 24.
FIGS. 4A and 4B are graphs each of which shows the relationship between depth and impurity concentration in the BILLI retrograde twin well conventionally fabricated. FIG. 4A shows the relationship between the impurity concentration and depth of first well 25, and FIG. 4B shows the relationship between the impurity concentration and depth of second well 27. In FIG. 4A, the curve corresponding to shallower region denotes the impurity concentration of first well 25, and curve corresponding to deeper region denotes buried region 26 under first well 25.
Referring to FIG. 4A, N-type impurity concentration of first well 25 increases with going into deeper from the surface of substrate 21, reaches its peak of 1.times.10.sup.17 to 5.times.10.sup.17 /cm.sup.3 at a depth of 0.6 to 0.8 .mu.m and then starts to decrease. P-type impurity concentration of buried region 26 formed under first well 25 starts to increase at the region where the N-type impurity concentration is reduced, reaches its peak of 1.times.10.sup.17 to 5.times.10.sup.17 /cm.sup.3 at a depth of 2.5 to 3.0 .mu.m and then starts to decrease.
Referring to FIG. 4B, N-type impurity concentration of second well 27 increases to reach its peak of 1.times.10.sup.17 to 5.times.10.sup.17 /cm.sup.3 at a depth of 0.8 to 1.2 .mu.m, and then starts to decrease. Thus, the well resistance is reduced, decreasing latch-up.
As described above, the BILLI retrograde twin well is formed in such a manner that, without removing the mask used for forming the first well, P-type impurity is ion-implanted with a high energy to penetrate the mask to form the second well self-aligned with the first well. Accordingly, the design rule for the well is scale down, improving the integration of the device.
However, during formation of the second well, the impurity is also implanted below the first well to form the buried region. When the dose of impurity which is implanted under the first well exceeds 6.times.10.sup.12 /cm.sup.2, damages due to ion implantation generate at points where impurity ions stop and grow toward the well surface, creating dislocation. This brings about leakage current at the contact between the semiconductor substrate and first well. Furthermore, the surface impurity concentration of the second well sensibly varies with the thickness of photoresist used as the mask, deteriorating reproducibility.